Quartus_blink/UML/activity.plantuml
2026-05-14 08:40:45 +03:00

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@startuml
start
:posedge clk;
'--- Step timer ---
if (step_cnt >= (freq_idx == 1 ? STEP_2SEC_MAX : STEP_4SEC_MAX)) then (yes)
:step_cnt := 0;
if (freq_idx == 5) then (yes)
:freq_idx := 0;
else (no)
:freq_idx := freq_idx + 1;
endif
else (no)
:step_cnt := step_cnt + 1;
endif
'--- Recalculate half-period ---
:max_count := calc_max_count(freq_idx);
'--- Blink generation for led ---
if (max_count == 0) then (0 Hz)
:blink_cnt := 0;
note right
led_base сохраняет предыдущее
значение (нет мигания)
end note
else (f > 0)
if (blink_cnt >= max_count) then (toggle)
:blink_cnt := 0;
:led_base := ~led_base;
else (count)
:blink_cnt := blink_cnt + 1;
endif
endif
'--- 1 Hz generation for pin ---
if (pin_cnt >= PIN_1HZ_HALF_MAX) then (toggle)
:pin_cnt := 0;
:pin_base := ~pin_base;
else (count)
:pin_cnt := pin_cnt + 1;
endif
'--- Outputs (combinational) ---
:led = ~led_base;
:pin = pin_base;
:pin_10 = led;
stop
@enduml